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Product Description
Broadcom 400GbE Reverse Gearbox - A1 silicon, 19 mm × 19 mm, 0.8-mm ball pitch, 484-ball BGA, RoHS-compliant - BCM81724A1KFSBG
The Broadcom BCM81724 is a single-chip 8 × 56 Gb/s to 16 × 25 Gb/s NRZ reverse gearbox with 8 × 56 Gb/s PAM-4 Pass-Through mode PHY. It supports both the PAM-4 and NRZ data formats. It supports Retimer, Forward, and Reverse Gearbox modes. It also supports 1G, 10G, 25G, 40G, 50G, 100G, 200G, and 400G line-card applications.
On-chip clock synthesis is performed by a low-cost 156.25 MHz reference clock via high-frequency, low-jitter phase-locked loops (PLLs).
The BCM81724 is fabricated in advanced low-power 16 nm CMOS technology and available in a 19 mm × 19 mm, 0.8 mm pitch, 484-ball BGA, RoHS-compliant package.
Features
- Host-side interface: 30 dB
- Line-side interface:
- 30 dB
- Chip-to-module (C2M) compliant
- Forward and Reverse Gearbox mode and Retimer mode
- Supports forward error correction (FEC)
- Supports 400G-CR8 mode
- Integrated AC-coupling capacitors at line-side receiver
- Multiple standard and line rate support for both PAM-4 and NRZ
- Continuous auto-adaptive equalizer
- Line- and system-side loopbacks
- PRBS generator/error checker
- Eye monitoring per lane on the line side, accessed through MDIO
- Single low-cost REFCLK input
- Recovered clock output
- Supports SGMII pass-through
- Interoperates with Broadcom ASIC and merchant switch silicon
- Low-power 16 nm CMOS design
- 19 mm × 19 mm BGA, 0.8 mm ball pitch package
Applications
- ASIC-to-module interface 16 × 25 Gb/s front-panel application
- ASIC-to-module interface 8 × 56 Gb/s front-panel application
- High-density 10G, 25G, 40G, 50G, 100G, 200G, and 400G front-panel line-card applications
DATASHEET
